SiP Integration of Reusable Chiplets

Patrick Dorsey, Intel

This talk will provide an overview of a trend to pursue SiP (System in Package) integration. SiP solutions support the disaggregation of IP blocks away from monolithic SoC structures and integration of board components to reduce latency and improve form factor. Disaggregation is driven by a desire to increase IP portability, harness the benefits of dissimilar technology nodes, address lithographic reticle size limitations and quickly create market targeted products. An ecosystem based on SiP integration of reusable chiplets is on the horizon. This ecosystem needs high density SiP technologies which provide scalable “monolithic like” integration capabilities. We will explore how technologies like Intel EMIB, Intel AIB and CoWoS can be employed to address these SiP trends and propose a solution to address the needs of this emerging ecosystem.