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Workshops/Tutorials
Once more we have a rich variety of tutorials and workshops.
The workshop on FPGAs for software programmers (FSP 2018) is again on this year on Friday, and RCML (Reconfigurable Computing for Machine Learning) is on Thursday. We have 10 tutorials which will be on in the laboratories of the Electronic Engineering and Computer Science.
On Thursday and Friday the morning sessions run from 9 – 13:00 with lunch from 13:00 – 14:00 (in the Dining Hall) then afternoon sessions run from 14:00 – 17:30. Coffee breaks are available at the same time at 10:30 am and 15:30 pm in the Lower Concourse.
Tutorials
| TOPIC | AFFILIATION | DURATION | TIME/Venue | CAPACITY |
| AWS F1 | Xilinx | full day | Thursday
AAP-2.15 |
50 |
| Chisel | TU Denmark | full day | Thursday
AAP-2.05 |
50 |
| Video Processing on Digilent Zybo Z7 | Digilent | full day | Thursday
AAP-2.28 |
25 |
| System Security Through Hardware-based Isolation | Uni Arkansas | half day | Thursday afternoon
Synge Theatre |
100 |
| PYNQ | Xilinx | full day | Friday
AAP-2.15 |
40 |
| The EXTRA Platform for the Design of HPC Reconfigurable Accelerators | Uni Gent | full day | Friday
AAP-2.28 |
35 |
| FPGA Verification Using Python | Curtiss Wright | half day | Friday morning
AAP-2.05 |
50 |
| FPGA Accelerators Using the Acceleration Stack for Intel® Xeon® CPU with FPGAs | Bill Jenkins, Sr. Product Specialist, Artificial Intelligence, Programmable Solutions Group, Intel | half day | Friday morning
LG36 |
30 |
| Enabling Design Automation in Xilinx Partial Reconfiguration Design Flow | TU Dresden | half day | Friday afternoon
LG36 |
25 max |
| Application Development for Amazon F1 with MaxCompiler | Maxeler | half day | Friday afternoon
AAP-2.05 |
25 |
Workshops
| TOPIC | DURATION/VENUE | TIME |
| Reconfigurable Computing for Machine Learning | Half day / Synge Theatre | Thursday morning |
| FPGAs For Software Programmers | Full day / Synge Theatre | Friday |